1. Technical Field
The present invention relates generally to fuse boxes and a semiconductor integrated circuit having the same and, more particularly, to a small-sized fuse box and a semiconductor integrated circuit having the same.
2. Related Art
As semiconductor integrated circuits become more and more reduced in size, the number of devices which are included into a given semiconductor chip increases. As the number of devices in semiconductor integrated circuits increase, then the frequency of defects increases simply because of the increased number of devices. This can adversely affect the yield of the semiconductor devices by making an unacceptable percentage of these semiconductor devices that are faulty.
In a conventional semiconductor integrated circuit, to reduce the density of the defects, a repair technique in which a defective cell is replaced with an additional ancillary cell has been proposed. This repair operation can be executed by displacing a redundancy circuit block in the semiconductor integrated circuit. The redundancy circuit block has to somehow recognize a defect position in the semiconductor integrated circuit and then to subsequently change an address path away from the defect cell to an additional ancillary cell. Here, the position of the address associated with the defective cell is stored in a fuse that is included in the redundancy circuit block.
The redundancy circuit block consists of a fuse block, which has a plurality of address fuses, and a plurality of redundancy circuits connected to the fuse blocks.
FIG. 1 is a plane view showing an example of a fuse box in a conventional column fuse block.
Referring to FIG. 1, address fuses 10, which are disposed away from each other, are arranged in a space defined by a fuse box 20. The address fuses 10 forms fuse sets, each of which has four fuses, and an individual redundancy circuit (not shown) is connected to the fuse set. The address fuses 10 that form one fuse set are connected to the dependency circuit (not shown) through one of the wires 30a, 30b, 30c and 30d. 
The wires 30a, 30b, 30c and 30d are routed to the circumference of the fuse box 20 in consideration of the blowing of the address fuses 10. Furthermore, the wires 30a, 30b, 30c and 30d are separately disposed along both sides of the fuse box 20, so that these wires are disposed sufficiently apart from each other in order to prevent or minimize any electrical interference therebetween. In addition, each of the wires 30a, 30b, 30c and 30d has to maintain an appropriate line width needed to prevent a signal delay.
As the integration of the semiconductor devices progressively increases, it becomes more necessary to integrate more memory cells in a restricted area. Accordingly, along with the reduction of the memory cell area, the fuse box area is also required to be reduced.
However, as well-known to those skilled in the art, it is very difficult to reduce the area of the fuse box 20 because the pitch between the fuses must be guaranteed within a laser alignment tolerance in order not to be adversely influenced at the time of blowing an adjacent fuse.
Furthermore, as mentioned above, since the wires 30a, 30b, 30c and 30d, which connect the address fuses 10 to a redundancy circuit block (not shown), are routed to the circumference of the fuse boxes 20, the areas of the wires 30a, 30b, 30c and 30d must necessarily also be included in the substantive area of the fuse boxes 20. Therefore, as considering the whole area of the semiconductor device, the relative ratio of the fuse box may be increased in area. That is, the fact that it is required to reduce the area of the redundancy circuit block, especially, the fuse boxes and the peripheral circuit thereof in the semiconductor integrated circuit.